1. Field of the Invention
The invention relates to the over-passivation process. More particularly, the invention relates to the over-passivation process that is advantageous to apply the curing process of polyimide material at low temperature.
2. Description of the Related Art
In recent years, with the advancement and development of the process of semiconductor fabrication techniques, many kinds of high performance electronic product are produced daily, and the level of integration of semiconductor integrated circuits (IC) is higher and higher. Before IC chips become usable products, they need to be packaged with sufficient protection from damage and electrical connection linking a chip to other devices or print circuit boards. Thus, IC packaging plays an important role to the ultimate performance of IC chips.
The typical electrical connection in IC package process can be classified into wire bonding package (WB), tape automatic bonding (TAB) and flip chip (FC), etc. And each of these packages has its' own characteristics and application field.
It is to be noted that no matter what kind of the above package be used, an IC chip is typically mounted on a carrier. In order to transmit signals, the pads on the carrier must be electrically connected to the pads on the chip; the carrier can be a lead frame or a ball grid array (BGA) substrate. It should be noted that the pads on the chips can form various kinds of layout and each kind of the layout should be compatible with that of the carrier. In most practical cases, one kind of pad layout can be utilized only for one carrier but not for the others. From time to time IC design engineer needs to utilize a redistribution circuitry to accommodate the layouts of two different connecting structures on the IC and the carriers regardless of the IC chip may bear the very same functionality. It is this redistribution circuitry that has to do with the intermetallic compound of two metal systems lying at the interface between the redistribution circuitry and an IC pad.
FIGS. 1A and 1B are cross-sectional representations of a conventional over-passivation process. As shown in FIG. 1A, a semiconductor wafer 100 comprises a substrate 110, an aluminum (Al) pad 120, a passivation layer 130, a first polyimide layer 140, an adhesion/barrier layer 150, a gold (Au) circuitry 160 and a second polyimide layer 170. The substrate 110 may comprise a silicon base and an interconnecting metallization structure, the interconnecting metallization structure being over the silicon base. Multiple electronic devices formed in or on the silicon base can be, for example, transistors, MOS transistors or passive devices. They are electrically connected to the aluminum pad 120 through circuit lines in the interconnecting metallization structure. Moreover, the aluminum pad 120 is placed over the substrate 110 and covered by the passivation layer 130, with an opening in the passivation layer 130 exposing the aluminum pad 120. In addition, the first polyimide layer 140 is placed over the passivation layer 130 and has an opening exposing the aluminum pad 120. Furthermore, an adhesion/barrier layer 150 is placed on the first polyimide layer 140 and aluminum pad 120, which is subsequently covered by a gold layer 160. A second polyimide layer 170 is deposited on the gold layer 160. Thereafter, semiconductor wafer 100 is separated into multiple semiconductor chips by a cutting process.
As shown in FIG. 1B, during the curing process of the second polyimide layer 170, attributed to its high curing temperature, which is often higher than 350° C., and the elongated process time, about several hours, such a process could lead to the inter-diffusion phenomenon of Al and Au penetrating through the diffusion barrier layer 150. If the adhesion/barrier layer 150 is too thin, eventually Au and Al will meet each other, and then an aluminum-gold inter-metallic compound (IMC) 180 will be formed at the interface of gold circuit 160 and adhesion/barrier layer 150. It should be noted that the aluminum-gold inter-metallic compound 180 is a porous structure; it not only weakens the mechanical integrity of the jointing structure, but also deteriorates the quality of electrical signal passing therethrough. To prevent such an aluminum-gold inter-metallic compound from occurrence, prior arts seek to increase the thickness of adhesion-barrier layer 150 or dope foreign ions or atoms into the adhesion-barrier layer 150. Regardless of which of the above process used, they both will increase the cost of production. Also, the quality of the electrical signal passing therethrough will be deteriorated in that a thickened or doped barrier layer 150 increases its parasitic resistance.
The other disadvantage of the high temperature curing process of polyimide layers lies on its impact on the thermal budget of IC manufacturing process. Because traditional curing process of polyimide layer is run at high temperature for several hours, and there may be multiple polyimide layers deposited over the semiconductor wafer, the curing process of polyimide will inevitably suppress the whole thermal budget to manufacture the semiconductor wafer 100. It is the trend of today's semiconductor fabrication process to lower the thermal budget since high temperature processes usually cause problems on the issues such as the formation of inter-metallic compound, diffusion among different layers, and exceeded thermal stress caused by the different thermal expansion coefficient of materials, etc. Take metal oxide semiconductor (MOS) as an example, the doped region (i.e. either the n-doped or p-doped area) will be expanded at high temperature process. The resulted expansion of the doped region may cause the side effect of gate channel shortening or the concentration profile change of the doped area.